| 摘要 |
<p>A system for testing semiconductor devices on device test boards has a single tester channel connected to multiple DUTs in a loop. Outputs from DUTs are received at a comparator and latch after a period of Round Trip Delay (RTD). The comparator is connected in a parallel configuration with the return path of the loop, where the point of connection is in greater proximity to DUT output pins than the test channel and is a path different from the tester I/O driver path, thus preventing input signals from test drivers from interfering with ouput signals from DUTs that will serve as inputs to test circuitry. The time it takes a new input cycle state to reach the output comparator is long after the output from a prior cycle has been tested. A diode clamp and resistor are connected in a series with the comparator at the input stage near the comparator in order to reduce ringing at the input of the comparator, which limits tester speed. Bus-switches composed of Field Effect Transistors (FET) electrically switch the input/output (I/O) of DUTs being tested to either exclusively drive or receive trace lines, respectively, reducing DUT pin loading and thus increasing achievable testing speed. The improved testing system functions in conjunction with a system designed to perform parallel test and burn-in of semi-conductor devices, such as the Aehr Test MTX System. The MTX can functionally test large quantities of semiconductor devices in parallel. This system of testing provides an effective and practical method for reducing overall test cost without sacrificing quality.</p> |
