Microcomputer debug architecture and method

摘要

A computer system, comprising at least one central processing unit and a memory unit coupled to the at least one central processing unit, a set of watchpoints defined in the computer system; each watchpoint in the set of watchpoints comprising a programmable precondition register and a programmable action register, a set of latches, and selection circuitry that selects one latch in the set of latches to couple an output of an action register to an input of the selected latch. <IMAGE>