SEMICONDUCTOR DEVICE HAVING MOS TRANSISTOR TEST PATTERN FOR PERFORMING CHARACTERISTIC TEST OF MOS TRANSISTOR HAVING FINE LINE WIDTH OF GATE

摘要

PURPOSE: A semiconductor device having a MOS transistor test pattern for performing a characteristic test of a MOS transistor having a fine line width of a gate is provided to test correctly an operating characteristic of a MOS transistor having a fine line width of a gate. CONSTITUTION: A gate(11) has a fine line width of a predetermined size. An auxiliary conductive layer pattern(15) is formed in a predetermined interval(d) from one end or the other end of the gate(11). A source electrode and a drain electrode(12,13) are formed between at a left side and a right side of the auxiliary conductive patterns(15). A line width(b) of the gate(11) is 0.1 to 0.3 micro meters. A line width(c) of the auxiliary conductive pattern(15) is 0.05 to 0.1 micro meter. An interval(d) between the gate(11) and the auxiliary conductive layer pattern(15) corresponds to an interval between transistor electrodes formed on a cell region.