| 摘要 |
PURPOSE: A bus access circuit of a digital still camera is provided to carry out compression and reproduction, or restoration and regeneration of image data simultaneously by time division of a bus access time by a single memory. CONSTITUTION: A bus access circuit of a digital still camera includes a digital signal processing block(202) for processing image signals according to image capture to digital signals and outputting vertical and horizontal synchronization signals(VSYNC,HSYNC), a DRAM for temporarily storing bit stream type data of the digital signal processing block, a memory control part(203) for controlling data reading/writing of the DRAM(204), a microcomputer(206) for compressing storing data corresponding photographing key inputs among the data stored in the DRAM in an enable section of vertical and horizontal bus control signals(VBCTL,HBCTL) to store in a flash memory(207) and restoring the data stored in the flash memory in the enable section of the vertical and horizontal bus control signals to store in the DRAM, and a timing generating part(205) for operating vertical and horizontal synchronization of the digital signal processing block for outputting the vertical and horizontal bus control signals to the microcomputer.
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