摘要 |
PROBLEM TO BE SOLVED: To obtain an LVDS interface circuit where even a delay in one of differential input signals from the other causes no difference in amplitude of output differential signals. SOLUTION: The interface circuit 10 is provided with a 1st current switching circuit consisting of transistors(TRs) Qp1, Qn1 that selects a 1st current source Qpa or a 2nd current source Qna for the connection to a 1st output terminal 4 in response to a 1st input signal IN1 and with a 2nd current switching circuit consisting of TRs Qp2, Qn2 that selects the 1st current source Qpa or the 2nd current source Qna for the connection to a 2nd output terminal 5 in response to a 2nd input signal IN2, and receives signals inverted too each other as the 1st and 2nd input signals IN1, IN2 and outputs differential signals. The interface circuit 10 is also provided with a 3rd current switching circuit consisting of TRs Qp3, Qn3 that selects the 1st current source Qpa or the 2nd current source Qna for the connection to a dummy capacitor 12 in response to a 1st input signal Sg1 and the dummy capacitor 12 whoe one terminal is connected to a constant level point.
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