Segmented word line architecture

摘要

The master word line (WL0)is assigned an additional master word line (MWL1), to form master word line pairs in a memory cell field. The additional master word line can be decoded into several sub-word lines, as can the master word line. One master word line is connected via its sub-word lines (SWL) with memory banks of one logic state and the other master word line is connected via its sub-word lines with memory bands of the other logic state. Hence in word line direction, the memory banks of each logic state can be alternately accommodated. Between the master word lines and the sub word line a single address unit (5) is switched. Both master word lines have several sections of the sub word line assigned to them.