发明名称 |
Capacitors, DRAM arrays, monolithic integrated circuits and methods of forming capacitors, DRAM arrays and monolithic integrated circuits |
摘要 |
The invention includes a number of methods and structures pertaining to semiconductor circuit technology, including: methods of forming DRAM memory cell constructions; methods of forming capacitor constructions; DRAM memory cell constructions; capacitor constructions; and monolithic integrated circuitry. The invention includes a method of forming a capacitor comprising the following steps: a) forming a mass of silicon material over a node location, the mass comprising exposed doped silicon and exposed undoped silicon; b) substantially selectively forming rugged polysilicon from the exposed undoped silicon and not from the exposed doped silicon; and c) forming a capacitor dielectric layer and a complementary capacitor plate proximate the rugged polysilicon and doped silicon. The invention also includes a capacitor comprising: a) a first capacitor plate; b) a second capacitor plate; c) a capacitor dielectric layer intermediate the first and second capacitor plates; and d) at least one of the first and second capacitor plates comprising a surface against the capacitor dielectric layer and wherein said surface comprises both doped rugged polysilicon and doped non-rugged polysilicon.
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申请公布号 |
US6207523(B1) |
申请公布日期 |
2001.03.27 |
申请号 |
US19970887742 |
申请日期 |
1997.07.03 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
PAREKH KUNAL R.;ZAHURAK JOHN K.;WALD PHILLIP G. |
分类号 |
H01L21/02;H01L21/8242;H01L29/94;(IPC1-7):H01L21/20 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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