| 摘要 |
A digital concatenator, the operation of which is triggered by the sequential arrival of a series of n-bit bytes thereto, accepts such sequential n-bit bytes and, by directing those n-bit bytes into sequentially identified n-bit channels, concatenates those n-bit bytes into (nxm)-sized words, where m is a pre-selected integral number of said n-bit bytes that are desired to be concatenated within an (nxm)-sized output buffer into a resultant sequence of (nxm)-sized words. The sequential identification of those n-bit bytes is brought about by a cyclical counter incorporated within a data enumerator that counts off the arrival of each n-bit byte and appends a corresponding position bit or byte to each one thereof. Each successive reading of the output of the concatenator is triggered by the arrival at that output buffer through an mth channel of an mth n-bit byte. The concatenator similarly operates on single bits so as to serve as a serial to parallel converter of arbitrarily selectable size.
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