Slave circuit select device which can individually select a plurality of slave circuits with one data bus

摘要

A select signal generating circuit S2 issues two pulse signals onto select signal line CEL under the control by chip 0 of a master chip. The select signal line CEL has a folded form. The D-flip-flop detects the fact that the second pulse signal issued from the select signal generating circuit S2 arrives at the position of the corresponding slave chip when a first pulse signal issued from the select signal generating circuit S2 and returning from the folded point of the select signal line CEL arrives at the position of the same slave chip, whereby selection of the chip is performed.