| 摘要 |
PROBLEM TO BE SOLVED: To enhance a detection efficiency of a clock signal. SOLUTION: The clock signal detection circuit detects a clock signal and outputs a clock detection voltage. When an anode voltage (clock signal) VD IN of a diode 11 is higher than a cathode voltage VD OUT, the clock signal is injected to a transmission line 12 and reaches a reflecting load 13 with a prescribed delay time. In this case, when the anode voltage (clock signal) VD IN of the diode 11 is smaller than the cathode voltage VD OUT, the clock signal is reflected by the reflecting load and returns to the cathode of the diode 11 through the transmission line 12. Then injection/reflection is repeated at a period of the clock signal so that the diode output amplitude is increased and a clock detection voltage nearly equal to the amplitude of the clock signal is obtained from an averaging circuit 3. |
