发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 PROBLEM TO BE SOLVED: To enable to screen effectively bit lines having leak by pre-charging and equalizing a pair of bit lines once at the time of a test mode, and making a bit line pre-charge/equalizing circuit an off-state after delay of a fixed period. SOLUTION: When a test mode entry signal ϕ EQLOFF is a high level, all equalizing/pre-charge circuits 180 are made an off-state, a delay timer circuit input ϕ delay is made a high level by making a chip internal activating signal/ ACTIVE a low level from a high level, and a timer output signal ϕ EQLOFFB is made a low level after a fixed period t1. Thereby, equalizing operation of a non-selection side is started. But, the equalizing/precharge circuit of a bit line of a selection side is not activated. A period t1 suppresses equalizing operation before read-out of a selected bit line so that a selected bit line is not equalized.
申请公布号 JP2001076498(A) 申请公布日期 2001.03.23
申请号 JP19990250516 申请日期 1999.09.03
申请人 TOSHIBA CORP 发明人 MAKINO HIDEKAZU;WATANABE YOJI;KATO DAISUKE
分类号 G11C11/401;G11C7/12;G11C11/409;G11C11/4094;G11C29/04;G11C29/14;H01L21/8242;H01L27/108 主分类号 G11C11/401
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