发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain a video signal processing circuit which reduces drift, improves stability, simplifies a circuit, does not damage the digital gradation supplied by an A/D converter and can use inexpensive parts. SOLUTION: This circuit is provided with a clamping circuit 12 which clamps an analog video signal 11 at the timing of a clamp pulse 17, an A/D converter 13 which converts the output signal of the clamping circuit 12 to a digital signal and outputs it to each processing circuit, a latch circuit 14 which latches the digital output of the A/D converter 13 in the pause period of the analog video signal 11, a comparator 15 which compares the digital output of the latch circuit 14 with an ideal clamp value 18 (digital value), and a D/A converter 16 which converts the comparison result of the comparator 15 to an analog signal in the DC level and applies it to the clamping circuit 12 as a feedback voltage 19 to perform clamping.
申请公布号 JP2001078055(A) 申请公布日期 2001.03.23
申请号 JP19990247009 申请日期 1999.09.01
申请人 NEC VIEWTECHNOLOGY LTD 发明人 BUNGO YOSHIHIRO
分类号 H04N5/18;(IPC1-7):H04N5/18 主分类号 H04N5/18
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