发明名称 AND CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain an AND circuit the output level changing time of which does not change largely even when the input level of any input terminal is changed. SOLUTION: An AND circuit has a plurality of transistors QN1-QNC arranged in a matrix form, a plurality of input terminals INA-IND connected to the input of one of the transistors QN1-QNC, and one output terminal. Of the transistors QN1-QNC, the transistors arranged in each row are cascade- connected to form transistor rows TA1-TA3 which are connected in parallel with each other between the output terminal OUT and a ground. In addition, each input terminal INA-IND is connected to the inputs of the transistors in all rows. The AND circuit is constituted in such a way that the plurality of transistors connected with each input terminal (INA-IND) mutually contain the transistors arranged in different rows.
申请公布号 JP2001077308(A) 申请公布日期 2001.03.23
申请号 JP19990218204 申请日期 1999.07.30
申请人 ANDO ELECTRIC CO LTD 发明人 NAKAIZUMI KAZUO
分类号 H01L21/822;H01L27/04;H03K19/003;H03K19/017;H03K19/0948;H03K19/20;(IPC1-7):H01L27/04;H03K19/094 主分类号 H01L21/822
代理机构 代理人
主权项
地址