| 摘要 |
PROBLEM TO BE SOLVED: To minimize imprints by gradually decreasing the voltage applied to several evaluation capacitor cells having the same area or the same capacitance as a memory cell for enabling effective evaluation and guarantee at low cost and in a short time. SOLUTION: A real memory cell 20 which functions as a nonvolatile memory and memory cells 21a and 21b which have evaluation ferroelectric capacitor are provided. Assuming that the voltage applied to the ferroelectric capacitor of the real memory cell 20 to be 1, adjust the voltage applied to the ferroelectric capacitors of the evaluation memory cells 21 so that the voltage is gradually decreased from 1 to 0.95, 0.9, 0.85, 0.8, 0.75, 0.7, and finally to 0.6. The evaluation memory cells are regarded as data storage characteristic evaluation memory cells which stores a total of 8 words by changing the voltage for each word. Before leaving at high temperature, function verification is performed as a pre-bake test. Chips which do not meet the specifications for a semiconductor memory device are rejected with respect to their positions in a wafer. |
