发明名称 POWER MOS TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To enhance a gate in width per unit area so as to improve ON-state resistance in area efficiency by a method wherein a second gate is separated from a first gate for a prescribed distance. SOLUTION: A first gate 13-1 is positioned above a center line and composed of a vertical part 13-1a, an up-sloping part 13-1b, a vertical part 13-1c, a down- sloping part 13-1d, and a vertical part 13-1e, extending from the one side of a semiconductor region of a MOS transistor 10 to the opposed other side of the semiconductor region. A second gate 13-2 is positioned below the center line and arranged separate from the first gate 13-1 for prescribed distance. By this setup, a gate can be enhanced in width per unit area, and an ON-state resistance can be improved in area efficiency.
申请公布号 JP2001077208(A) 申请公布日期 2001.03.23
申请号 JP19990253757 申请日期 1999.09.08
申请人 ROHM CO LTD 发明人 YAMAMOTO SEIICHI
分类号 H01L21/8234;H01L21/28;H01L27/088;(IPC1-7):H01L21/823 主分类号 H01L21/8234
代理机构 代理人
主权项
地址