| 摘要 |
PROBLEM TO BE SOLVED: To shorten cycle time and to increase operation speed at reading out in a logic-mix DRAM. SOLUTION: This DRAM-macro is provided with a memory array having plural memory cells, a pair of read-data lines RDL provided extending on a memory array in a direction of column, a read-column decoder 110 (110f, 110n) generating a column selecting signal for coupling selectively the pair of read- data lines RDL and plural sense amplifiers, and a pre-amplifier 42 amplifying potential difference generated in the pair of read-data lines RDL. The pre-amplifier 42 (42f, 42n) and the read-column decoder 110 are arranged at regions being opposite side each other keeping the memory array between them. |
