发明名称 DEVICE AND METHOD FOR COMPILATION
摘要 PROBLEM TO BE SOLVED: To effectively optimize an object code in the range satisfying limitation caused by the number of physical registers of a processor. SOLUTION: This compiler device performs code generation from a program represented by a DAG(directed acyclic graph) while evaluating the number of used registers and the number of execution cycles and optimizes a code to be generated. That is, the compiler calculates the number of cycles with which each operation can be executed on the DAG and the number of the currently available registers, performs code generation while preceding an operator on an execution path that takes the most time in the DAG in a part where the number of registers is sufficient, and performs code generation while preceding such an operator as to reduce the number of used registers when the number of registers is not sufficient.
申请公布号 JP2001075814(A) 申请公布日期 2001.03.23
申请号 JP19990232533 申请日期 1999.08.19
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 KOSEKI SATOSHI;INAGAKI TATSUSHI;YASUE TOSHIAKI;KOMATSU HIDEAKI;TAKEUCHI MIKIO
分类号 G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/45
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