摘要 |
An integrated VCO (10), preferably in a radio ASIC (110), with a resonator comprising an M-M capacitor (80) and a varicap (90), wherein the M-M capacitor (80) is connected to and stacked on top of the varicap (90). Typically, the stacking of the M-M capacitor on top of the varicap is not possible in an ASIC-process due to parasitic capacitance (120, 130). However, since the M-M capacitor (80) already is connected (100) to the varicap (90), the parasitic capacitance (130) is short-circuited. Thus, the stacking of the M-M capacitor on top of the varicap implies reduced resonator dimension saving valuable ASIC area (110) while improving performance. |