CONNECTION ARRANGEMENT FOR ENABLING THE USE OF IDENTICAL CHIPS IN 3-DIMENSIONAL STACKS OF CHIPS REQUIRING ADDRESSES SPECIFIC TO EACH CHIP

摘要

An integrated circuit [10] having first and second identical layers of circuitry [11-14]. Each layer [11-14] includes a substrate having a plurality of components thereon. Each layer [11-14] also includes circuit selection circuitry for enabling the integrated circuit components on that layer to perform a predetermined function. The circuit selection circuitry includes a circuit selection terminal [30] for receiving a signal that enables the predetermined function. Each layer [11-14] also includes N input pads [15-20] and N output pads [21-26], where N>1. The input and output pads are labeled from 1 to N. Each input pad [15-20] is connected to a corresponding one or the output pads [21-26]. The connexion scheme is chosen such that there is a one-to-one mapping between the input pads [15-20] and the output pads [21-26] and no input pad is connected to an output pad on that layer having the same label as the input pad. The circuit selection terminal [30] is connected to a predetermined one of the input pads [17]. The layers are connected such that the input pad labeled k on the second layer is connected to the output pad labeled k on the first layer for k=1 to N.