发明名称 Method to prevent CMP overpolish
摘要 A process for avoiding dishing in a planarizing layer whose final thickness is reduced by Chem. Mech. Polishing, is described. The first step is to coat the surface to be planarized with a layer of a hard dielectric material, such as silicon nitride, prior to depositing the planarizing medium. After the latter has been reflowed, its thickness is reduced by means of CMP. While CMP is being applied, the etch rate is constantly sensed. When the etch front approaches the aforementioned hard layer a decrease in the etch rate is sensed and etching is terminated, thereby eliminating any dishing effects.
申请公布号 US6204195(B1) 申请公布日期 2001.03.20
申请号 US19980166734 申请日期 1998.10.05
申请人 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION 发明人 CHIEN RONG-WU;WU CHIA-HUI;PAI HONDA
分类号 H01L21/02;H01L21/3105;H01L21/8242;(IPC1-7):H01L21/302;H01L21/824 主分类号 H01L21/02
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