HIGH SPEED SAMPLING CIRCUIT AND METHOD FOR CALIBRATING PHASE IN THE CIRCUIT

摘要

PROBLEM TO BE SOLVED: To accurately maintain a sampling period set to each of a plurality of A/D converters, to calibrate the sampling period at high accuracy and to sample data at high speed with high accuracy. SOLUTION: An output clock of a system being a phase difference generating section 1a is used as a reference clock, and employs a phase difference detector 7 to detect the phase differences between the output clocks of other systems. A control means 15 uses DDS(direct digital synthesizer) 5b-5n to shift a phase of an output clock of other reception system so as to make a phase difference of the DDS 5b-5n of the other system from the reference clock accurate based on the detected phase difference. A sampling section 1b used A/D converters 17a-17n by each system to sample input data at different times to realize high speed sampling.