发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR DESIGNING THE SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit which facilitates correcting operation for a mask and makes it efficient to vary the driving capacity of a transistor, without altering the arrangement position of a layout pattern, when a timing violation place, etc., is found after the mask layout of the semiconductor integrated circuit is formed and a method for designing the semiconductor integrated circuit. SOLUTION: This semiconductor integrated circuit is composed of a cell or function block constituted which includes a mask pattern 102 for gate electrode formation and a mask pattern 103 for active region formation on a semiconductor substrate. The semiconductor integrated circuit is characterized by that the length of a projection part of a gate electrode is made large in advance, and the output of the transistor can be controlled with the right-left width of the mask pattern 103 for the mask pattern 103 for active region formation.
申请公布号 JP2001068550(A) 申请公布日期 2001.03.16
申请号 JP19990238819 申请日期 1999.08.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOKOYAMA KENJI;SUGANO MASAHIDE;KAJIMOTO YASUHIKO;TAKENAKA YASUSHI;TANAKA YASUHIRO;HASHIMOTO SHINICHI;SUZUKI TAKEO
分类号 H01L21/8238;H01L21/82;H01L27/092;(IPC1-7):H01L21/82 主分类号 H01L21/8238
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