发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To make it possible to actuate a memory provided with a built-in logic at high speed without increasing the number of the manufacturing processes of the memory, by a method wherein a first circuit comprises a type I insulated-gate field-effect transistor as its constituent element, and a second circuit comprises a type II insulated-gate field-effect transistor as its constituent element. SOLUTION: Bit line equalizing circuits 11l and 11r as a first circuit are respectively provided to a pair of bit lines BLL and ZBLL and a pair of bit lines BLR and ZBLR, and MOS transistors NT1 to NT6 are constituted of a DRAM transistor on those circuits 11l and 11r. Moreover, bit line separation gates 12l and 12r are connected with a sense amplifying circuit 13, and MOS transistors NT7 to NT10 of the gates 12l and 12r as a second circuit of the circuit 13 are constituted of a DRAM transistor. As a result, a memory provided with a built-in logic can be actuated at high speed without increasing the number of manufacturing processes of the memory.
申请公布号 JP2001068634(A) 申请公布日期 2001.03.16
申请号 JP19990243189 申请日期 1999.08.30
申请人 MITSUBISHI ELECTRIC CORP 发明人 NODA HIDEYUKI;ARIMOTO KAZUTAMI;DOSAKA KATSUMI;FUJINO TAKESHI
分类号 G11C11/401;G11C5/02;G11C7/10;G11C7/18;G11C11/407;G11C29/12;H01L27/10;H01L27/108;(IPC1-7):H01L27/10 主分类号 G11C11/401
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