发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To test a spare element even after being packaged by setting a test mode and forcibly activating at least one of a redundant row and a redundant column. SOLUTION: When a spare element is tested (low), a combination of external addresses is set to a redundant row test mode among a spare element test mode. Thereafter, an input command is set to a mode register set cycle. An output of a mode register (1) 43 consequently changes from a 'LOW' level to a 'HIGH' level. Then, the input command becomes row active. At the same time, an output of a control circuit 41 changes from the 'LOW' level to the 'HIGH' level. A redundant row activation circuit 24 forcibly activates a redundant row. According to the mode, those connected to normal bit liens can be tested among the redundant row.</p>
申请公布号 JP2001067894(A) 申请公布日期 2001.03.16
申请号 JP19990242207 申请日期 1999.08.27
申请人 TOSHIBA CORP 发明人 YOSHIDA MUNEHIRO;KATO DAISUKE
分类号 G11C11/413;G11C11/401;G11C11/407;G11C16/06;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C11/413
代理机构 代理人
主权项
地址