发明名称 FILTER ADJUSTMENT CIRCUIT AND RECEIVER EMPLOYING THE SAME
摘要 PROBLEM TO BE SOLVED: To automate adjustment of a cut-off frequency of a filter. SOLUTION: The filter adjustment circuit is provided with a filter 42 whose cut-off frequency is changed by digital data D48, a phase comparator circuit 41, a window comparator circuit 44 and a counter 48 that counts number of clocks PCK to generate the digital data D48. The digital data D48 are fed to a filter 19 whose characteristic is an object of adjustment as a characteristic adjustment signal. When an output signal S44 of the window comparator circuit 44 is settled within a specified range, an AND circuit 45 blocks the output signal S44 to stop counting of the counter 48 and a power supply circuit 52 stops consumption of operating power of the phase comparator circuit 41 and the window comparator circuit 44.
申请公布号 JP2001068966(A) 申请公布日期 2001.03.16
申请号 JP19990242499 申请日期 1999.08.30
申请人 SONY CORP 发明人 OKASHIN YAMATO
分类号 H03H11/04;(IPC1-7):H03H11/04 主分类号 H03H11/04
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