| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the power consumption resulting from an extended dynamic range of analog adders on a post-stage caused by increase in an accumulated value attended with increase in the number of taps. SOLUTION: A matched filter that is the filter circuit receives a spread spectrum received signal Dm being a consecutive analog input signal in time series and correlation arithmetic units F1-FN multiply spread codes P1-PN in coefficient units A1-AN respectively by the time series data and each product is respectively integrated. Any of quantizers Q1-QN obtains a partial quantization value in a unit of an optional stage whose integrated value is increased on the basis of any of the spread codes P1-PN, any of adders K21-K2N each consisting of a counter sequentially sums the partially quantized values and transfers a unit at a post-stage, and any of adders K12-K1N of the next stage unit obtains an analog residue resulting from subtracting an analog converted value of the partially quantized value by any of D/A converters C1-CN-1 from the integrated value to suppress the increase in the analog accumulated value.</p> |
