发明名称 METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY OPERATION AND SEMICONDUCTOR MEMORY
摘要 PURPOSE: A method is provided to keep a high speed operation cycle by reducing the number of terminals required for command input and the number of terminals required for address input in a method for controlling the operation of a semiconductor memory provided with a plurality of operation modes and in a semiconductor memory provided with a plurality of operation modes. CONSTITUTION: Signals supplied from prescribed terminals are taken in as commands a plurality of times, operation modes are successively narrowed down on the basis of the commands, and an internal circuit is controlled conforming to narrowed down operation modes. As information required for decision of an operation mode are taken in a plurality of times and an operation modes are narrowed down the number of terminals required for command input is reduced. Especially when a terminal for exclusive use for command input is provided, an input pad, circuits such as an input circuit and the like are made unnecessary, and chip size is reduced.
申请公布号 KR20010020813(A) 申请公布日期 2001.03.15
申请号 KR20000024083 申请日期 2000.05.04
申请人 FUJITSU LIMITED 发明人 SUZUKI TAKAAKI;UCHIDA TOSHIYA;SATO MITSUNORI;YAGISHITA YOSHIMASA
分类号 G11C11/407;G11C5/06;G11C11/401;G11C11/4063;(IPC1-7):G11C11/406 主分类号 G11C11/407
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