发明名称 METHOD AND ARRANGEMENT FOR LOCKING A CONTROL VOLTAGE TO A VOLTAGE-CONTROLLED OSCILLATOR
摘要 <p>To lock a control voltage to a voltage-controlled oscillator (1) in correspondence with a desired frequency (fref), a comparator (7) compares the output frequency (fvco) of the voltage-controlled oscillator (1) with the desired frequency (fref). A signal is generated in response to any frequency difference to adjust the control voltage until the frequency difference is zero. A copy of the control voltage is generated at least when said frequency difference is zero, and this generated copy is applied as control signal to the voltage-controlled oscillator (1) to lock its output frequency at the desired frequency (fref).</p>
申请公布号 WO2001018968(A1) 申请公布日期 2001.03.15
申请号 SE2000001546 申请日期 2000.08.04
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