发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF |
摘要 |
PURPOSE: A semiconductor integrated circuit device and a manufacture thereof are provided to reduce contact resistance by preventing reduction of a contact area between a plug and a barrier layer in a DRAM in which a bit line is formed on the plug composed of a polycrystalline silicon film via the barrier layer. CONSTITUTION: When a plug(21) composed of a polycrystalline silicon film is formed inside a contact hole(19) to which a bit line(BL) is connected, the upper surface of the plug(21) is recessed to a level lower than the upper end portion of the contact hole(19). A plug(22) composed of a laminated layer film of a TiN film(26) and a W film(27) is formed on the plug(21). Subsequently, a bit line BL having a thinner width than the diameter of the contact hole(19) is formed by patterning the W film deposited on the contact hole(19). At this time, the W film(27) constituting the plug(22) is also etched in the contact hole(19), but the TiN film(26) constituting the other part of the plug(22) is hardly etched.
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申请公布号 |
KR20010021337(A) |
申请公布日期 |
2001.03.15 |
申请号 |
KR20000047490 |
申请日期 |
2000.08.17 |
申请人 |
HITACHI ULSI SYSTEMS CO., LTD.;HITACHI.LTD. |
发明人 |
TOYOKAWA SHIGEYA;HASHIMOTO KOJI;KURODA KENICHI;YOSHIDA SEIJI;IWAKI TOSHIYUKI;MATSUOKA MASAMICHI |
分类号 |
H01L27/10;H01L21/02;H01L21/28;H01L21/60;H01L21/768;H01L21/8234;H01L21/8242;H01L27/088;H01L27/108;(IPC1-7):H01L27/10 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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