发明名称 |
METHOD FOR MULTIPLYING CLOCK SIGNAL USING PHASE INTERPOLATION AND APPARATUS THEREOF, ESPECIALLY WHERE OUTPUT OF FIRST EXCLUSIVE OR GATE IS COMPLEMENTARY SIGNAL TO SECOND EXCLUSIVE OR GATE |
摘要 |
PURPOSE: A method for multiplying a clock signal using phase interpolation and an apparatus thereof are provided to enable to generate a clock signal having a phase difference of 90 degree more easily. CONSTITUTION: According to the apparatus for increasing a clock signal, a phase interpolator(502) comprises a pair of outputs including the first output and the second output, and a pair of inputs including the first input and the second input. A differential to single ended converter(504) comprises two inputs and outputs, and is connected to the phase interpolator. The first exclusive OR gate(506) comprises a pair of input and output including the first input and the second input. And the second exclusive OR gate(508) comprises a pair of inputs and outputs including the first input and the second input.
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申请公布号 |
KR100464932(B1) |
申请公布日期 |
2004.12.24 |
申请号 |
KR19980008028 |
申请日期 |
1998.03.11 |
申请人 |
MAGNACHIP SEMICONDUCTOR, LTD. |
发明人 |
ANDERSON MICHAEL B. |
分类号 |
H03B19/14;H03K5/00;(IPC1-7):H03K5/00 |
主分类号 |
H03B19/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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