Analog test access port and method therefor

摘要

An improved system and method to ensure the testability of any analog cell embedded in a mixed signal IC is described wherein the testability is independent of the core logic of that IC, which does not require the dedication of any pin solely to the testing of that IC. A uniform analog test access port design simplifies chip layout, greatly reduces the nunber of MUXed pins required, and allows generation of an analog test program for the total chip which is a simple concatenation and re-use of the individual analog cell test programs.