发明名称 Synchronous clock generator including a delay-locked loop signal loss detector
摘要 A loss of signal detector for use with a delay-locked loop of the type which produces a plurality of output signals in response to a clock signal, is comprised of a first monitor for receiving a first one of the plurality of output signals from the delay-locked loop. The second monitor receives a second one of the plurality of output signals from the delay-locked loop. The first and second signals are preferably, but not necessarily, in quadrature with respect to one another. Each of the monitors is clocked with a clock signal and the inverse of the clock signal. A plurality of logic gates is responsive to the first and second monitors for producing an output signal.
申请公布号 US6201424(B1) 申请公布日期 2001.03.13
申请号 US19990316076 申请日期 1999.05.20
申请人 MICRON TECHNOLOGY, INC. 发明人 HARRISON RONNIE M.
分类号 H03L7/081;H03L7/087;H03L7/095;(IPC1-7):H03L7/06 主分类号 H03L7/081
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