发明名称 Method to form a smooth gate polysilicon sidewall in the fabrication of integrated circuits
摘要 A method for forming gate structures with smooth sidewalls by amorphizing the polysilicon along the gate boundaries is described. This method results in minimal gate depletion effects and improved critical dimension control in the gates of smaller devices. The method involves providing a gate silicon oxide layer on the surface of the semiconductor substrate. A gate electrode layer, such as polysilicon is deposited over the gate silicon oxide followed by a masking oxide layer deposited over the gate electrode layer. The masking oxide layer is patterned for the formation of the gate electrode. An ion implantation of silicon or germanium amorphizes the area of the polysilicon not protected by the masking oxide mask and also amorphizes the area along the boundaries of the polysilicon gate. Thereafter, the amorphized silicon is then removed by an anisotropic etch leaving a narrow area of amorphized silicon on the gate electrode sidewalls under the edges of the masking oxide mask completing the gate structure having smooth sidewalls.
申请公布号 US6200887(B1) 申请公布日期 2001.03.13
申请号 US20000490133 申请日期 2000.01.24
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING LTD 发明人 BALASUBRAMANIAM PALANIVEL;BALASUBRAMANIAN NARAYANAN;PRADEEP YELEHANKA RAMACHANDRAMURTHY;KANTIMAHANTI ARJUN
分类号 H01L21/28;H01L21/316;(IPC1-7):H01L21/476 主分类号 H01L21/28
代理机构 代理人
主权项
地址