| 摘要 |
An integrated circuit having an apparatus for automatically adjusting noise immunity is disclosed. The integrated circuit includes multiple functional logic circuits, a clock generator, a group of noise monitor circuits, and a control logic circuit. The clock generator generates a clock signal to all these circuits. The noise monitor circuits are utilized to detect noise occurring in the integrated circuit. In response to any noise detected by the noise monitor circuits, the control logic circuit decreases the speed of the clock signal sent to all the circuits, especially the functional logic circuits, via a slow down signal to the clock generator. Alternatively, the control logic circuit can inform the functional logic circuits via a noise alert signal to increase the noise immunity of certain noise sensitive circuits within the functional logic circuits.
|
