| 摘要 |
A bias current for an integrated circuit is generated by generating a first bias current that increases with temperature, generating a second bias current that decreases with temperature, and summing the first bias current and the second bias current. Summing may take place by mirroring the first bias current, mirroring the second bias current and summing the mirrored first bias current and the mirrored second bias current. Pull-down circuits also are preferably provided for the circuits that generate the first and second bias currents. The pull-down circuits are responsive to a pulse signal. The pulse signal may be generated from a power-down signal or another signal. Accordingly, bias current generating circuits and methods can have reduced susceptibility to changes in temperature, changes in power supply voltage and/or process variations, and can rapidly produce the bias current.
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