发明名称 Manufacture of FET transistor with elevated source and drain regions and minimal channel length, overlaps regions of differing dopant levels at each end of gate
摘要 A gate structure is constructed on the substrate. Near one end of this, a region is doped to a first concentration. A second doped region is formed at a second concentration, overlapping the first. Yet a third doped region is formed, overlapping the second, and having a third doping level differing from the others. The raised drain includes the third region. The second dopant concentration is lower than the third.
申请公布号 DE10031624(A1) 申请公布日期 2001.03.08
申请号 DE20001031624 申请日期 2000.06.29
申请人 HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. 发明人 HO LEE, JUNG
分类号 H01L21/205;H01L21/311;H01L21/336;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L21/205
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