DOUBLE SHIFT INSTRUCTION FOR MICRO ENGINE USED IN MULTITHREADED PARALLEL PROCESSOR ARCHITECTURE
摘要
A method of operating a processor comprises concatenating a first word and a second word to produce an intermediate result. An ALU (76a) shifts the intermediate result by a specified shift amount and stores, in a register (76b), the shifted intermediate result in a third word.
申请公布号
WO0116758(A2)
申请公布日期
2001.03.08
申请号
WO2000US23982
申请日期
2000.08.31
申请人
INTEL CORPORATION;WOLRICH, GILBERT;ADILETTA, MATTHEW, J.;WHEELER, WILLIAM;BERNSTEIN, DEBRA;HOOPER, DONALD
发明人
WOLRICH, GILBERT;ADILETTA, MATTHEW, J.;WHEELER, WILLIAM;BERNSTEIN, DEBRA;HOOPER, DONALD
