发明名称 BRANCH INSTRUCTION FOR PROCESSOR ARCHITECTURE
摘要 A processor such as a parallel hardware-based multithreaded processor (12) i s described. The processor (12) can execute a computer instruction that is a branch instruction that causes the instruction sequence in the processor (12 ) to determine whether a byte in a register (80, 78, 76b) is equal or not equa l to a specified byte value contained in the instruction and performing the branching operation specified by the branch instruction based on the specifi ed byte being equal or not equal to the byte in the register (80, 78, 76b).</SD OAB>
申请公布号 CA2383532(A1) 申请公布日期 2001.03.08
申请号 CA20002383532 申请日期 2000.08.31
申请人 INTEL CORPORATION 发明人 WOLRICH, GILBERT;BERNSTEIN, DEBRA;HOOPER, DONALD;WHEELER, WILLIAM;ADILETTA, MATTHEW J.
分类号 G06F9/30;G06F9/312;G06F9/315;G06F9/32;G06F9/38;(IPC1-7):G06F9/32;G06F9/44 主分类号 G06F9/30
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