发明名称
摘要 PURPOSE: To make an integrated circuit low in cost by making output data a set or reset state when a J signal and a K signal are different and outputting the previous output data when the J signal and the K signal are the same. CONSTITUTION: When a J signal is an H level and a K signal is an L level, an N-MOS5 is turned on and a P-MOS2 is turned off. Because a node N3 is also an H when a node N1 is the H, an N-MOS6 is turned on. At this time, when an inversion clock signal BCP becomes the H, an N-MOS4 is also turned on and the node N1 changes from the H to an L. Next, when a clock CK rises to the H, the node N3 or an output terminal 17 becomes the L and an output terminal 16 becomes the H. Namely, an output signal Q becomes the H and an inversion output signal BQ becomes the L. The both of the J signal and K signal are the L, a clock signal CP becomes the H and the output signal Q maintains its previous state even if a clocked inverter 13 is activated.
申请公布号 JP3143022(B2) 申请公布日期 2001.03.07
申请号 JP19940217652 申请日期 1994.09.12
申请人 发明人
分类号 H03K3/356 主分类号 H03K3/356
代理机构 代理人
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