发明名称 |
Method of manufacturing a semiconductor device with reduced masking and without ARC loss in peripheral circuitry region |
摘要 |
Improved dimensional accuracy of the gate electrode structure in the peripheral circuitry region of a semiconductor device is achieved by avoiding ARC loss during photoresist stripping associated with plural maskings in the core memory cell region during patterning and ion implantations. Processing is simplified by employing the same mask in the memory cell region for patterning the stacked gate electrode structure and for ion implanting the shallow source/drain extensions. Embodiments include initially etching to form the gate electrode structure in the peripheral circuitry region. Subsequently, processing in the core memory cell region is conducted by etching the stacked gate electrode structure and ion implanting to form the source/drains with attendant stripping of photoresist layers.
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申请公布号 |
US6197635(B1) |
申请公布日期 |
2001.03.06 |
申请号 |
US19990417130 |
申请日期 |
1999.10.13 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
HSAIO TOMMY C.;RAMSBEY MARK T.;SUN YU |
分类号 |
H01L21/336;H01L21/8247;H01L27/105;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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