发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To lighten a load of an address amplifier and to improve operation speed by supplying address signals having different signal form for each plural groups discriminating whether an input address signal is an address selecting a memory cell having defect or not. SOLUTION: It is judged by row redundant address discriminating circuits 601, 602 of a first row redundant address discriminating section 610 whether row addresses gra00z-gra08z are addresses selecting a regular memory cell having defect or not by using reversed internal row addresses ra00z-ra08z. Also it is judged by row redundant address discriminating circuits 604, 605 of a second row redundant address discriminating section 611 whether row addresses gra00z-gra08z are addresses selecting a regular memory cell having defect or not by using internal row addresses ra00x-ra08x.
申请公布号 JP2001060399(A) 申请公布日期 2001.03.06
申请号 JP19990234157 申请日期 1999.08.20
申请人 FUJITSU LTD 发明人 NAGASAWA TAKAYUKI;FUJIOKA SHINYA
分类号 G11C11/401;G11C8/12;G11C29/00;G11C29/04 主分类号 G11C11/401
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