发明名称 SHIFT REGISTER AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To shift a signal to a post stage without attenuating a level of the output signal and to prevent malfunction caused by variation of characteristics of a transistor. SOLUTION: A (K) th stage of this shift register is taken as an example, a TFT 21 is turned on by a signal ϕ1 from an outside, and outputs a level of the output signal OUTk-1 to wiring capacitors C2, C5. When the output signal OUTk-1 is the high level, electric charges are accumulated in the wiring capacitors C2, C5, and TFTS 22, 25 are turned on. Electric charges of wiring capacity C6 are discharged by reference voltage Vdd supplied through a TFT 23, and a TFT 26 is turned off. When a signal CK-1 is made the high level, this is outputted as an output signal OUTk through the TFT 25. When an output signal OUTk+1 of the high level is outputted from the next stage, a TFT 31 is turned on, the electric charges accumulated in the wiring capacitors C2, C5 are discharged through the TFT 31.
申请公布号 JP2001060398(A) 申请公布日期 2001.03.06
申请号 JP19990233929 申请日期 1999.08.20
申请人 CASIO COMPUT CO LTD 发明人 KANBARA MINORU
分类号 G11C19/00;G02F1/133;G09G3/20;G09G3/36;G11C19/28 主分类号 G11C19/00
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