| 摘要 |
PROBLEM TO BE SOLVED: To cancel noise and also quickly output a signal according to need. SOLUTION: This noise cancel circuit 20 comprises a delay circuit 28 composed of three D flip-flops FP1 to FP3 serially connected to an input signal terminal 22, a 1st NAND circuit 30 inverting and outputting the AND between a signal from the circuit 28 and an input signal, a 2nd NAND circuit 32 inverting and outputting the AND between a switching signal and the input signal, and a 3rd NAND circuit 34 inverting and outputting the AND between signals from the both circuits 30 and 32. The clock input terminal CK of each of the D flip-flops FP1 to FP3 is connected to a clock terminal 26, and a reset terminal R is also connected to a switching signal terminal 24. The input signal is outputted from an output terminal 36 when the switching signal is Hi, and the AND between a signal delayed by the circuit 28 and the input signal, i.e., a signal from which noise is eliminated is outputted when the switching signal is Lo. |
