发明名称 |
Method of forming a MOS transistor with a litho-less gate |
摘要 |
The width of the gate of a MOS transistor can be formed to have nanometer-width gate sizes, which are substantially less than the minimum feature size that can be photolithographically obtained with the method that is used to fabricate the MOS transistors, in a litho-less process by utilizing a conductive side wall spacer to form the gate of the MOS transistor.
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申请公布号 |
US7482228(B1) |
申请公布日期 |
2009.01.27 |
申请号 |
US20050305994 |
申请日期 |
2005.12.19 |
申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
PADMANABHAN GOBI R.;YEGNASHANKARAN VISVAMOHAN |
分类号 |
H01L21/336;H01L21/8234 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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