发明名称 |
Multiple Source-Single Drain Field Effect Semiconductor Device and Circuit |
摘要 |
Disclosed are embodiments of a design structure for a variable-delay field effect transistor (FET) having multiple source regions that can be individually and selectively biased to provide an electrical connection to a single drain region. Delay is a function of which of the multiple source regions is/are selectively biased as well as a function of gate resistance and capacitance. Such a variable-delay FET can be incorporated into a phase adjusting circuit, which uses gate propagation delays to selectively phase adjust an input signal. The phase adjusting circuit can be tuned by incorporating non-salicided resistances and additional capacitance at various positions on the gate structure. The phase adjusting circuit can further be modified into a phase adjusting mixer circuit that enables a phase adjusted signal to be combined with an additional signal.
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申请公布号 |
US2009106707(A1) |
申请公布日期 |
2009.04.23 |
申请号 |
US20070873515 |
申请日期 |
2007.10.17 |
申请人 |
ABADEER WAGDI W;BONACCIO ANTHONY R;IADANZA JOSEPH A |
发明人 |
ABADEER WAGDI W.;BONACCIO ANTHONY R.;IADANZA JOSEPH A. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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地址 |
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