发明名称 Slave device with synchronous interface for use in synchronous memory system
摘要 A method of operating a master/slave system includes the step of identifying a master receive data phase value to coordinate the transfer of data from a slave device without phase alignment circuitry to a master device with a universal phase aligner. Data is transferred from the slave device to the master device in accordance with the master receive data phase value. The master device characterizes a master transmit data phase value to coordinate the transfer of data from the master device to the slave device. Subsequently, the master device routes data to the slave device in accordance with the master transmit data phase value.
申请公布号 US7548601(B2) 申请公布日期 2009.06.16
申请号 US20070777960 申请日期 2007.07.13
申请人 发明人
分类号 H04L25/00 主分类号 H04L25/00
代理机构 代理人
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