发明名称 LINEAR AMPLIFIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To minimize a gain drop and also to obtain a low noise characteristic by providing a detecting means detecting current and a 1st transistor which makes a control terminal a signal input and its 2nd terminal a signal output, etc., and realizing an accurate emitter degeneration resistance. SOLUTION: This circuit comprises a transistor 1, an FET 2 functioning as a variable resistance and a circuit 3 for compensation. Then, an external reference resistance 6 is connected to a transistor 4 between transistors 4 and 5 commonly connected to a base to which a bias is given by a bias generation circuit 11, resistances 8 and 9 are respectively connected between the collectors of the transistors 4 and 5 and a power source, the current difference between currents caused to flow to the both resistances is detected by potential difference, and an operational amplifier 10 applies feedback to the gate bias of a FET 7 and controls the gate voltage of the FET 2 for a variable resistance at the same time. Thus, an accurate emitter degeneration resistance is realized all the time even though there are fluctuations in a power supply voltage, temperature and an element value.
申请公布号 JP2001057511(A) 申请公布日期 2001.02.27
申请号 JP19990232140 申请日期 1999.08.19
申请人 HITACHI LTD 发明人 TANAKA SATOSHI;TAKIGAWA KUMIKO;KOKUBO MASARU
分类号 H03D7/14;H03F1/30;H03F1/32;H03F3/193;(IPC1-7):H03F1/32 主分类号 H03D7/14
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