发明名称 Process for integrating hemispherical grain silicon and a nitride-oxide capacitor dielectric layer for a dynamic random access memory capacitor structure
摘要 A method of creating a DRAM capacitor structure, featuring a crown shaped storage node structure, has been developed. The crown shaped storage node structure, features the formation of an hemispherical grain, (HSG), silicon layer, only on a top portion of the structure, with the bottom portion of the crown shaped storage node structure, featuring non - HSG, or smooth surfaces. This configuration is achieved via creation of a capacitor opening, in a doped oxide - undoped oxide, composite insulator layer, used as the shape for subsequent formation of an amorphous silicon crown shaped structure. Selective removal of the overlying doped oxide layer, allows selective formation of an HSG silicon layer, only on the exposed top portion of the amorphous silicon crown shaped structure. Subsequent removal of the undoped oxide layer, exposes a bottom portion of the amorphous silicon crown shaped structure, featuring non - HSG silicon surfaces, allowing easier formation of a capacitor dielectric layer, specifically at the bottom corner of the crown shaped storage node structure.
申请公布号 US6194265(B1) 申请公布日期 2001.02.27
申请号 US19990358987 申请日期 1999.07.22
申请人 VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION 发明人 CHANG JUNG-HO;CHEN HSI-CHUAN;LIN DAHCHENG
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/02
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