发明名称 Data processing device having a variable length code processing mechanism
摘要 A data processing system which is able to execute, decode and encode process variable length code (VLC) data in a finite number of programming steps and thereby reduce the time required to manipulate VLC data. This is accomplished by using buffer registers to store VLC data loaded from memory and VLC data to be stored to memory. Offset registers are used to indicate the size of the blank region within the buffer registers provided. Using these offset registers load and store processing between the memory and buffer registers and shift processing within the buffer registers can easily be accomplished.
申请公布号 US6195741(B1) 申请公布日期 2001.02.27
申请号 US19980145034 申请日期 1998.09.01
申请人 FUJITSU LIMITED 发明人 ASATO AKIRA
分类号 G06F12/04;G06F9/312;G06F9/315;(IPC1-7):G06F9/30 主分类号 G06F12/04
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