| 摘要 |
<p>PROBLEM TO BE SOLVED: To enable page erasion having completely interchange ability, that is, adaptability for a standard process by applying negative voltage in which single supply voltage is boosted secondarily to a single word line selected by a row decoder during a erasing phase period, and applying positive voltage- boosted first to a common source of all cells of a block and a separated region of a substrate. SOLUTION: A erasion/write-in control logic circuit 620 drives an adjustor 610 comprising an electric charge pump circuit generating normally negative and positive voltage and a voltage adjustor relating to the circuit and generating the required voltage. Negative boosted voltage generated by the adjustor 610 is supplied to program switches 605A, 605B, row decoders 601A, 601B, source decoders 602A, 602B, and a separated region of a substrate. Algorithm for erasion of a byte erasing block 600B is different from that of a sector erasable block 600A, but each page erasion can be performed by applying pulse sequence of voltage for erasion increased by stages.</p> |
